Engineers predict that over the next decade, processors and memory will be put onto a single chip. This would narrow and altogether remove the processor-memory performance gap and it will have the following additional benefits: provide an perfect building-block for processing, lessen the costs of fabrication, and better utilize the number of transistors that can be placed on a single chip. Intelligent RAM or IRAM as they call it because most of the transistors on this fused chip will be committed to memory.

The goal of the IRAM is to show that a single chip with a plain and simple processor and a very high bandwidth local memory can be faster on memory problems. It will also be a much better match to real-time applications

IRAM's large improvement in memory system bandwidth has significant potential for helping re-configurable systems to reach their full performance. Re-configurable systems offer better performance by changing processing capabilities to the applications needs. By making the processing portion of the application go faster, a conventional memory system will be more of a drag on its performance. Memory bandwidth is also the performance bottleneck to fast programming of the re-configurable elements. That is why the IRAM group is working closely with the BRASS (Berkeley Re-configurable Architecture, Systems and Software) group, led by Prof. John Wawrzynek and Andre DeHon. It is a group at Berkeley that deals with all the Computer Architectures, and different systems and its software.

Some topics in this essay:
RAM DRAM, RAM IRAM, Implications Obvious, DRAMs Plants, Probably DRAM, Scientific American, Intel Motorola, Sun SGI, RAM Nowadays, David Patterson, memory bandwidth, memory processor, single chip, fabrication lines, processor memory, intelligent ram, ram dynamic ram, re-configurable systems, row column, memory wall, memory microprocessor,