... allowed for a greater clock speed. First was the Model 595 which ran at 135 MHz, and later came the Model 397 and RS/6000 SP which ran at 160 MHz. The Model 397 and RS/6000 SP were the last and fastest models to implement the Power2 architecture through the P2SC chips. The Power3 processor brought together the fundamental design of the ... various stages of execution. There are also some pervasive functions included on the chip such as; trace and debug, built-in self-test (BIST), performance monitoring unit, service processor interface (SP), power-on reset (POR), and error detecting and...

• Word Count: 5619
• Approx Pages: 22
• Has Bibliography
• Grade Level: High School